There's a lot more than great skiing going on in Grenoble, France these days. The Design and Reuse Center (D&R), a spin-off from research and development efforts at the University of Grenoble, is delivering up intellectual property (IP) management software both as a technical commodity and as an intriguing business model.

Gabriele Saucier is co-founder and director of the center. Just retired from the University of Grenoble, she's now able to turn her attention full-time to the business of running and developing the center. The center currently employs 15 people. They would like to have more, but as with every other enterprise in the headcount-starved technology industries, they're having trouble finding enough bodies to make the thing grow.

The D&R Center was incubated at the University of Grenoble in 1997 through a joint effort with the European Authorities and MEDIA (one of Europe's advanced technology research programs). Representatives of the semiconductor industry doing business in and around Grenoble also threw development money into the mix. It was a big project with high visibility within the French design community. Everybody knows that designs are going to have to rely more and more on existing circuit design blocks if the multi-million gate projects on drawing boards and backs of envelopes are going to be translated into reality within a reasonable time-to-market window.

Information on demand

Currently the D&R Center not only offers access to information and evaluation of over 1500 IP blocks through a website, it also offers an IP management software environment that encapsulates designs for reuse and exchange. The website is managed by co-founder and software developer, Philip Coeurdevey.

The website offers the IP Catalog Builder for the Internet. The IP database is stored in .xml format where the user can see that an IP block has a particular design characterization. Coeurdevey developed a process for describing, encapsulating, and capturing IP blocks using .xml. Meanwhile, MetaData allows the user to know about the IP before committing additional resources to evaluating a potential IP purchase. The customer can see the VSIA characterization or other parameters that may meet the needs of a particular design project.

The IP Profiler is another way to find out what's cooking. A data management system that offers an organization of files associated with IP, it puts tags on the test and report files to provide a handle for the evaluator to better understand how that part might fit into the target design. With all of these pieces in place, it's easy to manage IP, Saucier says. She hopes the concepts and the business model will prove increasingly profitable in the coming period, and feels that the D&R Center is providing a standard for an IP commodity enterprise within the design supply chain.

So far, website user demographics provide an interesting view into today's world of IP reuse: 45 percent from the United States, 40 percent from Europe, and 15 percent from Japan. People are coming to the website in the order of 60,000 visitors per month. These statistics are revised quarterly by the D&R Center and made available to the subscribers of the service. Saucier says the numbers are very impressive. They are not just tourists, but very technical and knowledgeable people involved in the process of design reuse and characterization.

To date, there are 10,000 registered users. The concept is straightforward: facilitate partnerships between the client in need of IP and provider of same. The D&R Center has approximately 100 partners of its own. These companies pay for a subscription to the "Yellow Pages" that the D&R maintains; this service lists different IP providers and their range of products and offerings. That information base along with listings of various tool resellers offers a plan whereby in a perfect world, according to Saucier, the D&R Center could eventually provide listings and information about all IP available in the world.

Saucier says the people at the D&R Center are clear about their vision. They don't want to broker IP and they don't want to qualify IP, although this hasn't always been the case. They gave up on those initiatives because the IP vendors weren't providing enough consistent information about their products. The liabilities were, therefore, too high for intermediaries.

"If you try to test IP for the customer, you'll spend two years on the effort and earn no money," Saucier says. It's too tough to act as the go-between for the vendors and their customers. "You'll kill yourself if you're in the middle," she observes. So, the D&R Center concentrates on being a web portal to IP and tool vendors and on providing IP reuse management software and training.

A tradition in technology

Saucier studied in Strasburg, in the Alsace region of France, and came to Grenoble after completing her graduate work because the emphasis on computer science prevalent at the University dove-tailed with her own interests. She has acted as graduate advisor to over 100 students at the University and, although technically retired, has 5 students still finishing up their work under her guidance.

The inevitable question about Paris being the center of the world gets a reaction from Saucier. She says that Gernoble has been a technical center for research and development in France for over 100 years, and adds that the University Grenoble (originally founded in 1339) provides one of the largest centers for the study of computer science and electrical engineering in Europe. The range of faculty research interests includes categories as diverse as native object systems, robotic systems control, RTOS, massively parallel processors, wireless access protocol (WAP), and optical interconnect.

The University is also a center for research and development in the areas of integrated circuit design and system integration. The TIMA Laboratory (Techniques of Informatics and Microelectronics for computer Architecture) is a research arm within the University community. There are a variety of special interest groups within TIMA reflecting the scope of technologies under exploration there.

The Integrated System Design group is investigating the use of redundant notation in the design of VLSI circuits for high-speed arithmetic operators or digital signal processing. Researchers and students there are looking at 3D CMOS design methodologies, design and modeling in Gallium Arsenide, and asynchronous design.

The VDS Group (Verification and modeling of Digital Systems) emphasizes research into hardware description languages (HDLs), specification languages, functional specification, symbolic model checking, and other areas of interest related to verification.

The System-Level Synthesis Group is investigating methodologies for the specification, design, and synthesis of multi-processor systems. Recent research initiatives that have been spun out into industrial applications include hardware/software co-design, VHDL-based behavioral synthesis, and multi-language co-simulation. Going forward, this group will be exploring system-level modeling, multi-processor architecture, and distributed shared memory for multi-processors architecture.

The MCS Group (Microsystem) is involved in the development of manufacturing techniques, CAD tools, applications, and design and test solutions in an effort to make microsystems accessible to non-specialized institutions. The group also examines the viability of such systems in safety critical and hard environments including medical, aerospace, and high-temperature domains. As is appropriate to the end-users of the emerging technologies, there is a lot of collaboration between local industry and the group.

"We don't need to look to Paris for technical leadership," Saucier says emphatically. "However, like everywhere else, you have problems in keeping engineers." As is common these days throughout the design world, the D&R Center has a range of nationalities represented on the staff, including Russian, French, and various countries in the Middle East.

Big business

The industry presence in the Grenoble area reads like a Who's Who of electronics including among others, STMicroelectronics, Dessault, Hewlett Packard, Sun Microsystems, and Xerox. In particular, STMicroelectronics has a new facility nearby, considered by many to be the most advanced in Europe. ST is making major headway in system-on-a-chip (SOC) design and development in the realm of very deep submicron (VDSM) product development. "They're huge in Grenoble," according to Saucier. "In some ways, they control the economy here," she says. However, she also points out that no one is complaining because of the vigor they inject into the local technical environment.

Common wisdom says the extensive wireless communications market in Europe has been a driver for state-of-the-art research into system design and integration in universities and industry across the Continent. Similar research initiatives in the United States have been slower in picking up momentum, according to the same argument, because of the differences in consumer market demands between the two hemispheres.

However, the emerging technologies around system-on-a-chip design and IP design block reuse are now igniting intense interest around the world in these areas, facilitated by the Internet and remote collaboration philosophies. Grenoble and the D&R Center are well positioned to be leaders, particularly in the age of connectivity when information dissemination is just a matter of logging on and tuning in.

And, just for the record, Saucier does fully appreciate her location-the city of Grenoble set in one of the most beautiful valleys in the French Alps. But, she hastens to point out that she's not a skier. She's a snow boarder.

Peggy Aycinena is Editor for ISD Magazine.

To voice an opinion on this or any other article in Integrated System Design, please e-mail your comments to sdean@cmp.com

To voice an opinion on this or any other article in Integrated System Design, please e-mail your comments to sdean@cmp.com.